The present invention relates generally to testing integrated circuits, and in particular to leakage test of the inputs/outputs an integrated circuit.
Testing integrated circuits (ICs) is a routine task to improve quality of the ICs and to ensure that they meet designed specifications. Testing can be done at different points during manufacturing of the ICs. A test can be applied to the pads of an IC when it is at the wafer level or to the pins of the IC after it is formed in a package.
Leakage test is one of many different types of testing an IC. In this test, conventionally, a tester or an automatic testing equipment (ATE) is connected to the pins of the IC. The tester applies a predetermined DC voltage to the pin being tested and measures the resulting DC current at the pin. The value of the measured current is compared against the expected value to determine the pass/fail test result of the pin.
Leakage test using the conventional method, however, is time consuming. In addition, every pin being tested must be connected to a tester port or channel. This requires the tester to have enough channels to accommodate the number of pins of the ICs. Since the cost of the tester is proportional to the number of the tester channels, it is expensive for per pin leakage test using the conventional method.
There is a need for a different method of leakage test, which requires less time and is cost effective.